Integrated circuit reliability test systems have been devised to test the reliability of structures for interconnections or transistors in integrated circuit devices. The structures are placed under various dynamically varied environmental and stress conditions. For example, in order to design and implement a CPU to run at ultra-high frequencies (faster clock speeds), the interconnection structures and transistor structures for the CPU must be able to perform at these ultra-high frequencies and under the various dynamic stress conditions. Thus, before these structures are used in integrated circuit designs, they are specifically laid out in integrated circuit devices made specifically for testing purposes, where they are commonly referred to as devices-under-test (DUTs). The devices are then placed on a board where a number of signals can be fed to these DUTs. The board is then placed in a test chamber where the chamber can be programmed to create various environmental stress conditions such as variation in temperature and variation in electromagnetic field strength. While the board is in the chamber under programmed stress conditions, different types of signals at various frequencies can be provided to the DUTs to test the structures. Various characteristics of the structures within the DUTs can be monitored to appreciate the performance of the structures.
Referring to FIG. 1a, prior art systems provide a board 2 with a number of sockets for the placement of the DUTs (DUT1-DUT14). In routing the input signals to the DUTS, there is a connector 4 on the board to receive the input signals and to route the signals to each DUT via the data bus 6. The output signals generated by the DUTs are also passed back to the system via the data bus 6 and connector 4. One of the problems with this prior art system is that the input signal degrades when it travels down the data bus such that the input signal wave form at DUT1 is not the same as the input signal wave form at DUT7. This problem becomes particularly acute when the input signal is at a very high frequency such that a square wave form may become progressively less square the further away from the connector. FIG. 1b illustrates the wave form at DUT1 (FIG. 1a, 9) where the signal fairly resembles a square wave form input signal. FIG. 1c illustrates the wave form at DUT7 (FIG. 1a, 10) where the input signal has deteriorated such that it does not resemble the square wave form at all. A result of this phenomenon is that the input signals to the DUTs are not uniform and the results generated are therefore non-uniform and unreliable.